DRAM内存颗粒测试简介PPT课件.pptx

Introduction to DRAM Testing--- DRAM inside team--- 2015.MayAgendaBasis of TestingTypical DRAM Testing FlowBurn-inDC Test (Open/Short, Leakage, IDD)Functional Test & Test PatternSpeed TestDRAM ManufactureWaferAssemblyFinal TestingFinal ProductWhy Testing?To screen out defectWafer defectAssembly defectMake sure product meet spec of customerVoltage guard bandTemperature guard bandTiming guard bandComplex test patternCollect data for design & process improvementQualityReliabilityCostEfficiencyIC Test MethodologyPower Supply* DUT = Device Under TestPPSIC TesterDUT*InputDriverComparatorOutputTesting of a DUT: 1. To connect PPS, Driver, Comparator & GND. 2. To apply power to DUT. 3. To input data to DUT (Address, Control Command, Data) 4. To compare output with “expect value” and judge PASS/FAILBasic Test SignalDigital Waveform ElementsLogicVoltageTimingTypical DRAM Final Test FlowDRAM Burn-in (MBT) MBT is to stress IC and screen out early failuresHigh Temperature Stress (125degC)High Voltage StressStressful PatternNew product BIFailure RateMature productOperation TimeInfant MortalityNormal LifeWorn outBath CurveDRAM Burn-in (TBT)TBT is for long time test patternsMultiple temperature tested (e.g. 88’C, 25’C, -10’C)Long test time at low speedPatterns cover all cell arraysNo Stressful conditionHigh parallel test count, low costBoth MBT and TBT does NOT test DC (Ando Oven)DRAM Advantest TestDC TestOpen/Short testLeakage testIDD testFunctional Test (Core Test)Different parameter & Pattern for each functionTo check DRAM can operate functionallySpeed TestTiming test @ different speed gradeDC Test VCCDC Test Method:ISVM: I Source V MeasureVSIMV Source I MeasureVCCDC Test – Open ShortPurpose: Check connection between pins and test fixture Check if pin to pin is short in IC package Check if pin to wafer pad has open in IC package Check if protection diodes work on die It is a quick electrical check to determine if it is safe to apply power Also called Continuity TestDC Test –