查询IDT72413L35D供应商捷多邦,专业PCB打样工厂,.PDF

查询IDT72413L35D供应商捷多邦,专业PCB打样工厂,.PDF

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查询IDT72413L35D供应商捷多邦,专业PCB打样工厂,.PDF

查询IDT72413L35D供应商 捷多邦,专业PCB打样工厂,24小时加急出货 CMOS PARALLEL IDT72413 64 x 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz The IDT72413 is a 64 x 5, high-speed First-In/First-Out • 64 x 5 organization (FIFO) that loads and empties data on a first-in-first-out basis. • Low-power consumption It is expandable in bit width. All speed versions are cascad- — Active: 200mW (typical) able in depth. • RAM-based internal structure allows for fast fall-through The FIFO has a Half-Full Flag, which signals when it has 32 time or more words in memory. The Almost-Full/Empty Flag is • Asynchronous and simultaneous read and write active when there are 56 or more words in memory or when • Expandable by bit width there are 8 or less words in memory. • Cascadable by word depth The IDT72413 is pin and functionally compatible to the • Half-Full and Almost-Full/Empty status flags MMI67413. It operates at a shift rate of 45MHz. This makes it • IDT72413 is pin and functionally compatible with the ideal for use in high-speed data buffering applications. The MMI67413 IDT72413 can be used as a rate buffer, between two digital • High-speed data communications app

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