成像跟踪器及其能评估系统接口的硬件设计.pdf

摘 要 为了对红外成像跟踪算法进行性能评估测试，本文介绍并实现了一种高帧频红外 成像跟踪器及其相应的评估系统接口电路的硬件设计。 成像跟踪系统在硬件上采用了DSP ＋FPGA 的架构，对于低层次的、比较耗时且 重复性较多的象素级的图象处理算法采用了FPGA 硬件实现，而对于比较复杂的目标 检测及跟踪算法诸如单帧检测、双窗分割、多帧累加、目标标记等采用了DSP 软件开 发实现。同时对采用FPGA 实现图象预处理算法进行了探讨，分析了乒乓操作、流水 线操作等较为常见的设计思想，实现了高斯滤波、数学形态学滤波以及直方图统计等 图象预处理算法并进行了相关的仿真测试。 对于评估系统的数据传输接口部分，采用了通用串行总线（USB），理论上的极 限速度达到可以480Mbps ，能够满足大数据量比如图象数据的实时传输，以及支持热 插拔，安装方便，不受PC 机插槽数目的限制，通过一片FPGA 作逻辑电路的核心控 制器件，能够实现高帧频传送数字图象数据给红外成像跟踪器进行算法处理及其相应 的结果数据回传。最终完成了整个系统的设计和调试工作，并分析了工作的不足以及 提出了一些改进的意见。 关键词：USB DSP FPGA 流水线 形态学滤波 目标检测 I Abstract To evaluate the infrared imaging track algorithm, a system for infrared imaging tracker and related interface circuit for the tracker capability evaluation system is introduced. The infrared imaging tracker implements the hardware architecture based on DSP and FPGA. FPGA is used to implement the low-level image processing algorithm which is very time-consuming but repeated a lot, while DSP (digital signal processor) is used to implement the high- level, complex algorithm such as single frame detecting, image segmentation, and target marking. Several kind of logic design method such as ping-pong operation and pip- line operation is introduced. And the image pretreating algorithm such as GAUSS filter, morphologic filter, statistics of histogram based on FPGA is also discussed, and they have been implemented and verified successfully. Universal Serial Bus is adopted in the interface circuit for imaging tracker capability evaluation system. It has the ability of transferring data up to speed of 480Mbps in theory, supports hot plug, installed convenient ly, and is not limited by the number of PC interface. A chip of FPGA is used for the logic core controlling. The system can re