- 1、本文档共6页,可阅读全部内容。
- 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
《ECEB368 Project One DB129281》.docx
ECEB368 Project One--Basic CMOS Amplifier Design
D-B1-2928-1 Tang Qi
Summary
M1M2Av(dB)GBW(MHz)wlVB(mV)wlVBsim resultcal resulterrorsim resultcal resulterrorCS14.320.186009.320.0960021.1629.50139.22%899.4900.0M0.067%CG13.520.1860060.1860020.562.21989.2%573.4577.30.68%CD400.18600350.18450-1.378-0.567958.79%858.475512.05%Introduction
In this project, three kinds of basic CMOS amplifiers will be built in Cadence. They are designed to reach the specifications as below. As the similarity of bipolar and MOS small signal models suggests that the same must hold for MOS amplifiers, three basic CMOS amplifiers are accepted. They are common-source (CS) stage, common-gate stage, and common-drain (CD) stage, or source follower. These three basic CMOS amplifiers are designed as Fig.01 shows.
CSCGCDgain20dB20dB-2dBGBW400MHz400MHz600MHzpower consumption1mW1mW1mWsupply voltage1.2V1.2V1.2Vcapacitive load1pF1pF1pFnoiseTHDminimizedminimizedminimized
Table.01
Common Source Amplifier
The main aim is to adjust the characteristics of w, l, (m, and nfing) to satisfy that gain larger than 20dB and GBW larger than 400MHz (power consumption controlled). By theoretical analysis and practical trials, we will find several ways to achieve this.
First, build the circuit, do the packaging and set tests, as shown in Fig.01 Fig.02.
Fig.01 CS_amp_schemetic
Fig.02 CS_Test circuit
Initially, the default values of the PMOS NMOS from the tutorial are:
wlmnfingPMOS120.1818NMOS2.80.0914Table.02
However, the default settings could not satisfy the requirement that gain20dB for the GAIN is a lot smaller than expected 20dB.
Fig.03 initial setting simulation result
Trial 2, we multiplied 1.2 to w l of PMOS and then get GAIN=19.17 and GBW=461.4M.
Analysis- DC:
The simulation analysis with initial value from the cadence outputs the following list:
Fig.03 DC operation data of NMOS of CS
您可能关注的文档
- 《Datasheet_mass-flow-meter_ASF1400_E》.pdf
- 《DB11T837—2016 北京_机械式停车场(库)建设规范》.pdf
- 《Db2与Oracle数据库的差异》.doc
- 《DB32T 1553-2016 江苏省高速公路工程工程量清单计价规范》.pdf
- 《DB51T 393-2016 香肠调料技术要求》.pdf
- 《DCS与PLC区别》.doc
- 《DDR2与DDR3信号完整性及PCB设计》.pdf
- 《Debian_GNU-Linux_6.0_图形安装教程、网络配置、软件源、基本配置_(超详细)》.pdf
- 《Deep Learning and Its Applications to Signal and Information Processing 》.pdf
- 《Deep learning with COTS HPC systems》.pdf
最近下载
- 四川省2004年肺结核流行特征及空间聚集性分析.pdf VIP
- 《小肠梗阻的诊断与治疗中国专家共识(2023版)》解读.pptx
- 回收、暂存、中转废矿物油与含矿物油废物项目突发环境事件应急预案.docx
- 电路与电子学-课程教学大纲.doc VIP
- 安徽省A10联盟2023-2024学年高二上学期11月期中考试物理试题及答案.pdf
- 第三届全国新能源汽车关键技术技能大赛(汽车电气装调工赛项)考试题库资料(含答案).pdf
- 国家科技创新政策汇编 202305.pdf
- 东华大学819有机化学2018年考研真题.pdf
- 精品推荐企业财务制度通用版汇总.docx
- 2016年东华大学硕士研究生入学考试819有机化学考研真题.pdf
文档评论(0)